package SimpleLACore
import chisel3._
import chisel3.util._

object Consts {
  // Control Signals

  val Y      = true.B
  val N      = false.B


  // Branch Type
  val BR_N   = 0.U(3.W)  // Next
  val BR_NE  = 1.U(3.W)  // Branch on NotEqual
  val BR_EQ  = 2.U(3.W)  // Branch on Equal
  val BR_GE  = 3.U(3.W)  // Branch on Greater/Equal
  val BR_GEU = 4.U(3.W)  // Branch on Greater/Equal Unsigned
  val BR_LT  = 5.U(3.W)  // Branch on Less Than
  val BR_LTU = 6.U(3.W)  // Branch on Less Than Unsigned
  val BR_B   = 7.U(3.W)  // Branch

  // RS1 Operand Select Signal
  val OP1_rj = 0.U(1.W)
  val OP1_PC = 1.U(1.W)
  val OP1_X   = 0.U(1.W)
  // RS2 Operand Select Signal
  val OP2_rk = 0.U(3.W)
  val OP2_k = 1.U(3.W)
  val OP2_ui12 = 2.U(3.W)
  val OP2_si12 = 3.U(3.W)
  val OP2_si14 = 4.U(3.W)
  val OP2_of16 = 5.U(3.W)
  val OP2_ui20 = 6.U(3.W)
  val OP2_of26 = 7.U(3.W)
  val OP2_X   = 0.U(2.W)
  
  val alu_ADD   = 0.U(5.W)
  val alu_SUB   = 1.U(5.W)
  val alu_SLL   = 2.U(5.W)
  val alu_SRL   = 3.U(5.W)
  val alu_SRA   = 4.U(5.W)
  val alu_AND   = 5.U(5.W)
  val alu_OR    = 6.U(5.W)
  val alu_NOR   = 7.U(5.W)
  val alu_XOR   = 8.U(5.W)
  val alu_SLT   = 9.U(5.W)
  val alu_SLTU  = 10.U(5.W)
  val alu_COPY  = 11.U(5.W)
  val alu_MUL   = 12.U(5.W)
  val alu_MULH  = 13.U(5.W)
  val alu_MULHU = 14.U(5.W)
  val alu_MOD   = 15.U(5.W)
  val alu_DIV   = 16.U(5.W)
  val alu_MODU  = 17.U(5.W)
  val alu_DIVU  = 18.U(5.W)
  val alu_X     = 19.U(5.W)

  // Writeback Select
  val WB_ALU  = 0.U(3.W)
  val WB_MEM  = 1.U(3.W)
  val WB_PC4  = 2.U(3.W)
  val WB_CSR  = 3.U(3.W)
  val WB_CNTID= 4.U(3.W)
  val WB_CNTVH= 5.U(3.W)
  val WB_CNTVL= 6.U(3.W)
  val WB_LLB  = 7.U(3.W)
  val WB_X    = 0.U(3.W)

  val WB_R0 = 0.U(2.W)
  val WB_R1 = 1.U(1.W)
  val WB_RD = 2.U(2.W)
  val WB_RJ = 3.U(2.W)

  // Memory Type
  val MT_B   = 0.U(3.W)
  val MT_BU  = 1.U(3.W)
  val MT_H   = 2.U(3.W)
  val MT_HU  = 3.U(3.W)
  val MT_W   = 4.U(3.W)
  val MT_X   = 7.U(3.W)
//  val MT_X   = 0.U(3.W)
//  val MT_B   = 2.U(3.W)
//  val MT_BU  = 3.U(3.W)
//  val MT_H   = 4.U(3.W)
//  val MT_HU  = 5.U(3.W)
//  val MT_W   = 6.U(3.W)

  val M_X  = 0.U(2.W)
  val M_LD = 0.U(2.W)
  val M_ST = 1.U(2.W)
  val M_LL = 2.U(2.W)
  val M_SC = 3.U(2.W)

  val tlb_X :: tlb_srch :: tlb_rd :: tlb_wr :: tlb_fill :: tlb_inv :: Nil = Enum(6)
}
